自制的cklink连不上M61-32

显示全部楼层 · 2024-1-10 23:00:24

T-HeadDebugServer输出

Running Debug Server, auto to check the target at first...
+---                                                    ---+
|  T-Head Debugger Server (Build: Sep 26 2023, Windows)    |
   User   Layer Version : 5.18.00 
   Target Layer version : 2.0
|  Copyright (C) 2023 T-HEAD Semiconductor Co.,Ltd.        |
+---                                                    ---+
UI Version.
CONNECT: Start to connect target (Enter target_open).
CONNECT: Detect JTAG port for RISC-V cores.
CONNECT:    Configure cJTAG with 2-wires
CONNECT:    Read IDCODE Gets 0xffffffff, Manufid is 0x7ff.
CONNECT:    Configure CDI type to 2-wires.
CONNECT:    Read IDCODE Gets 0xffffffff, Manufid is 0x7ff.
CONNECT:    Configure CDI type to 5-wires.
CONNECT:    Read IDCODE Gets 0xffffffff, Manufid is 0x7ff.
CONNECT: Can't detect JTAG Port for RISC-V DM,keep going
CONNECT: Check the DEBUG ARCH automatically.
CONNECT:    Read IDCODE Gets 0xffffffff, Manufid is 0x7ff.
CONNECT: Try to connect target and get arch_ops.
CONNECT: +--Sync hacr width between HAD and ICE(hacr_8 default).--+
CONNECT:    Set HACR width to 8 according to program arguments.
CONNECT: +--Configure the channel between HAD and ICE.--+
CONNECT: Configure CDI type.
CONNECT:    Configure link with CDI 2.
CONNECT:    Read HAD reg 0x1f get 0xffffffff.
CONNECT:    0xffffffff is not an effective HID, target is identified as CDI 5.
CONNECT: Configure HACR width.
CONNECT:    Configure link with hacr_width_16.
CONNECT:    Read HID get 0xffffffff(not an effective HID).
CONNECT:    Target is identified as HACR width 8.
T-HEAD: CKLink_Lite_V2, App_ver 2.37, Bit_ver null, Clock 2526.316KHz,
       5-wire, With DDC, Cache Flush On, SN CKLink_Lite_V2-T000000000000008E34F5A1.
CONNECT: +--Attempt to obtain multi-cores and multi-processors data.--+
CONNECT: Check multi processors information.
CONNECT:    Try to check whether the target is a MCPU with HACR_16.
CONNECT:    Set HACR width to 16 according to program arguments.
CONNECT:    Set HACR width to 8 according to program arguments.
CONNECT:    Target is not multi-processors as it has no HAD_TOP.
CONNECT: Check multi-cores (CK860/C860) information.
CONNECT:    Target is not multi-cores as hacr_width is 8.
CONNECT: Check multi-cores (CK910/C910) information.
CONNECT:    Target is not multi-cores as hacr_width is 8.
CONNECT: +--Try to access CPU.--+
CONNECT: Init hacr width for CPU 0.
CONNECT:    Set cpus[0].hacr_width with had_info->hacr_width 8.
CONNECT: Check HAD connection for CPU 0.
CONNECT:    Read HID get 0xffffffff, HAD version is HAD_V5.
CONNECT:    Write DDCADDR with 0x00000000000abcd0.
CONNECT:    Read  DDCADDR get  0xffffffffffffffff.
CONNECT:    Can not access to HAD module as DDCADDR can not be written.
Extra Info: hacr width is 8.
ERROR: Fail to check had module of CPU 0, please check:
    1. the physical connection;
    2. the power of the target;
    3. the link clock (link clock <= (CPU clock/2));
    4. the reference voltage of link, default 3.3v;
For more information, please run Debugserver with connect log:
     Console: run Debugserver with arguments "--debug connect".
     UI     : select "Connect" from menu "Setting->Verbose Setting".